Improving multitask performance and energy consumption with partial-ISA multicores

Modern GPPs implement specialized instructions in the form of ISA extensions aiming to increase performance emerging applications. These impose a significant overhead area and power processor because their specific datapaths (e.g. hardware for SIMD FP may represent more than half core area). Considering that some devices (e.g., edge computing), must be as energy- area-efficient possible, sporadic usage many applications, we propose PHISA multicores. is composed heterogeneous cores same single base ISA, but asymmetric functionality: do not fully costly instruction extensions, making room designers add efficient cores. We show increases (32%) reduces energy consumption (82%) compared full-ISA systems with budget, multi-workload environments. • A multicore design partial-ISA implementation. Partial-ISA replaces resource-expensive extra count. Schedulers keep execution transparency between full- Evaluation several different scenarios, configurations optimization goals. shows better traditional designs.